NVIDIA
Senior Power Analysis and Optimization Engineer
$136K–$264K
US, CA, Santa Clara +1 · Senior · Full-time · Posted May 22, 2026
- Location
- US, CA, Santa Clara
US, TX, Austin - Experience
- MS (or equivalent experience) and 5 years of experience, or PhD and 3 years of experience.
- Education
- MS (or equivalent experience) or PhD in EE/CE/CS or related fields.
About the job
Analyzes and optimizes power in GPU and SoC designs by combining power architecture expertise, automation, machine learning, and LLMs.
What you'll do
- Analyze chip- and unit-level power data, identify root causes, and drive design improvements with cross-functional teams.
- Develop and deploy power-aware models, flows, and LLMs for anomaly detection, analysis, and optimization.
- Prototype architectural features in Verilog and automate power-analysis pipelines using programming languages and tools.
What they ask for
- Strong understanding of energy consumption, power estimation, data movement, and low-power design.
- Familiarity with Verilog and ASIC design principles, and hands-on experience with power-analysis tools or similar.
- Solid coding and automation skills, preferably in Python, Perl, and C++.
- Excellent communication and collaboration skills.
Nice to have
- Experience or strong interest in machine learning, reinforcement learning, and data analytics, ideally applied to EDA, architecture, or system-level optimization.
- Interest or experience building or using LLMs or other foundation models for engineering workflows.
Pay
136,000 USD - 218,500 USD base salary (Level 3); 168,000 USD - 264,500 USD base salary (Level 4)
Tools
Verilog, PowerArtist, PrimePower/PrimePower RTL, RTL Architect, Python, Perl, C++
AI focus
Build and apply machine learning, reinforcement learning, data analytics, and custom LLMs to analyze power, detect anomalies, identify causes, and recommend or tune power-efficient designs and policies.
Model-written summary · the original posting is authoritative