NVIDIA
Senior Software R&D Engineer, VLSI Physical Design
$168K–$310K
US, CA, Santa Clara +1 · Senior · Full-time · Posted Jul 22, 2026
- Location
- US, CA, Santa Clara
US, TX, Austin - Experience
- 6+ years in VLSI algorithms development using C++.
- Education
- BS, MS, PhD or equivalent experience in Electrical Engineering or Computer Science.
About the job
Develops and deploys software optimization algorithms for VLSI physical design to improve chip frequency and power efficiency.
What you'll do
- Invent optimization engines that combine physical design tasks, such as legalization and sizing.
- Improve C++ algorithms for sizing, buffering, clock skew, legalization, power minimization, ECO routing, and incremental parasitic extraction.
- Develop and deploy solutions in collaboration with chip design teams.
What they ask for
- 6+ years in VLSI algorithms development using C++.
- Strong understanding of VLSI timing optimization and related concepts, including cell libraries, interconnect models, crosstalk, glitches, IR drop, timing constraints, corners, and congestion.
- Familiarity with implementation tools such as ICC2, Innovus, PrimeTime, Tempus, and StarRC, and design flows written in Perl, Tcl, and Python.
- Strong communication and interpersonal skills.
Nice to have
- C++14 or newer and high-performance software design experience, including multithreading or distributed computing.
- Experience with reinforcement learning, GNNs (Graph Neural Networks), or other machine learning frameworks, especially applied to physical design.
Pay
168,000 USD - 264,500 USD base salary (Level 4); 196,000 USD - 310,500 USD base salary (Level 5)
Tools
C++, ICC2, Innovus, PrimeTime, Tempus, StarRC, Perl, Tcl
AI focus
Uses machine learning and specialized algorithms to develop VLSI design tools; relevant work includes reinforcement learning and GNNs applied to physical design. NVIDIA also uses AI tools in recruiting.
Model-written summary · the original posting is authoritative