Senior Systems Prototyping and Emulation Engineer

What you'll do

• Build, bring up, debug, and improve FPGA prototypes and emulation environments, including design partitioning and synthesis, place-and-route, and compilation flows.
• Develop emulation-friendly validation infrastructure, testbenches, transactors, and software interfaces; support internal customers with debug, validation, and software enablement.
• Collaborate across design, architecture, verification, validation, and software teams to verify complex systems and meet project goals.

What they ask for

• BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or a related field with 8+ years of experience, or MS with 6+ years of proven experience in FPGA prototyping and/or hardware emulation.
• Strong understanding of FPGA prototyping and hardware emulation architectures, devices, flows, and tools.
• Hands-on experience with Synopsys ProtoCompiler or Synplify Premier and Xilinx Vivado; familiarity with Synopsys ZeBu or Siemens Veloce.
• Knowledge of Verilog, SystemVerilog, and digital design; strong expertise in emulation-friendly C/C++ testbenches and transactors.

Nice to have

• Scripting knowledge (Perl/shell/Tcl/Python).
• Experience with memory bring-up, high-speed interfaces, emulation platforms, or pre-silicon software validation and system-level debug.

Pay

168,000 USD - 264,500 USD (base salary, Level 4); 196,000 USD - 310,500 USD (base salary, Level 5)

Tools

Synopsys ProtoCompiler, Synplify Premier, Xilinx Vivado, Synopsys ZeBu, Siemens Veloce, Verilog, SystemVerilog, C/C++