NVIDIA
Senior Verification Engineer – High Speed Coherent Interconnect Hub
$136K–$264K
US, CA, Santa Clara · Senior · Full-time · Posted Oct 20, 2026
- Experience
- 3+ years of ASIC verification experience with complex IPs or SoC subsystems.
- Education
- BS / MS or equivalent experience.
About the job
Verifies High Speed Coherent Interconnect Hub IP for next-generation computing platforms, from verification planning and environment development through coverage closure and design signoff.
What you'll do
- Develop verification infrastructure and test plans for coherency, ordering, error handling, and performance.
- Verify protocol compliance and performance, close functional and code coverage, and debug RTL and verification issues.
- Collaborate with architecture, design, FPGA, emulation, software, and post-silicon teams on validation and silicon bring-up.
What they ask for
- BS / MS or equivalent experience.
- 3+ years of ASIC verification experience with complex IPs or SoC subsystems.
- Strong background in SystemVerilog, UVM, constrained-random verification, and coverage-driven verification methodologies.
- Experience developing verification environments, checkers, assertions, and functional coverage; debugging with industry-standard simulation and debug tools.
Nice to have
- Experience verifying high-speed coherent interconnects, NoCs, or other complex SoC infrastructure IP; knowledge of CHI and AXI.
- Experience with performance verification; scripting skills in Python, Perl, or Shell.
Pay
136,000 USD - 218,500 USD base salary; 168,000 USD - 264,500 USD base salary
Tools
SystemVerilog, UVM, CHI, AXI, Python, Perl, Shell
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