Drimva

OLIX

AMS Engineer

$264K

Austin, TX · On-site · Full-time · Posted Jun 19, 2026

Experience
5+ years of analog/mixed-signal verification experience on complex SoCs or mixed-signal IP.
Education
BS/MS in Electrical Engineering or related field.
Visa sponsorship
Eligibility to work depends on most recent citizenship or permanent residency status due to U.S. export control regulations. Applicants whose most recent citizenship or permanent residence is in certain restricted countries may generally not be considered; subsequent citizenship or permanent residency in another country not subject to the restrictions may still allow eligibility.

About the job

Own verification of analog and mixed-signal blocks in high-speed I/O chains, building models, testbenches, and simulation flows to find and resolve issues before silicon tape-out.

What you'll do

  • Set verification strategy and plans from block level through subsystem and top-level integration, including coverage and tape-out sign-off.
  • Develop and validate behavioral models, self-checking testbenches, and AMS co-simulation flows; debug analog/digital discrepancies.
  • Collaborate with analog and DSP designers and support silicon bring-up and lab correlation.

What they ask for

  • BS/MS in Electrical Engineering or a related field.
  • Hands-on AMS modeling and verification experience with Verilog-AMS, real-number modeling, and analog-digital co-simulation.
  • Proficiency in SystemVerilog, assertion-based verification, and self-checking testbench development.
  • Ability to model analog blocks and validate models against transistor-level references.

Nice to have

  • Working knowledge of high-speed SerDes/wireline architectures and calibration or adaptation loops.
  • UVM or constrained-random verification; scripting with Python, TCL, or Make.

Pay

$264K (currency not specified; salary/base designation not stated)

Tools

Verilog-AMS, SystemVerilog real, wreal, Spectre AMS, FastSpice, SystemVerilog, UVM, Python

AI focus

Verification of mixed-signal subsystems in an AI computing solution; the role does not specify other AI-related work.

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 5, 2026 (UTC)