OLIX
Senior Analog Layout Designer
$292K
Austin, TX · On-site · Senior · Full-time · Posted Sep 16, 2026
- Experience
- 7+ years of Analog Layout Design experience; minimum 3 years with the listed TSMC FinFET processes.
- Visa sponsorship
- Eligibility to work at OLIX depends on candidates’ most recent citizenship or permanent residency status due to U.S. export control regulations. Applicants whose most recent citizenship or permanent residency is in certain restricted countries may generally not be considered; applicants who subsequently obtained citizenship or permanent residency in an unrestricted country may still be eligible.
About the job
Creates layouts for RX/TX lane macros and supports lane-level integration for OLIX’s decode accelerator.
What you'll do
- Create RX/TX lane macro layouts.
- Support lane-level integration.
- Own major layout macros through FinFET tape-outs and perform layout verification and EM/IR analysis.
What they ask for
- Understanding of semiconductor fabrication processes and device/layout cross-sections.
- At least 3 years of experience with TSMC FinFET processes: 2nm, 3nm, 4nm, and 5nm.
- Several FinFET tape-outs owning major layout macros, such as ADC, DAC, TIA, CDR, PLL, BGB, or LDO.
- Expert-level knowledge of layout planning, integration, routing, verification, EM/IR analysis, and Cadence Virtuoso and Calibre/Pegasus tools.
Nice to have
- Knowledge of SKILL, TCL, and Python scripting.
Pay
$292K (base salary; type not specified in posting)
Tools
TSMC FinFET, Cadence Virtuoso, Calibre, Pegasus, SKILL, TCL, Python
Model-written summary · the original posting is authoritative