OpenAI
Design Verification Engineer
$226K–$445K
San Francisco · Hybrid · Full-time · Posted Oct 29, 2025
- Experience
- 3+ years of experience in hardware verification.
- Education
- BS/MS in EE/CE/CS or equivalent.
- Visa sponsorship
- Candidates may need to meet certain legal status requirements under U.S. export control laws and regulations.
About the job
Verify custom silicon for AI accelerators, from individual IP blocks through subsystems and full SoCs, to ensure functional correctness and reliable production hardware.
What you'll do
- Own verification of IP blocks, subsystems, or full-chip SoC functionality; define plans from architecture and microarchitecture specifications.
- Develop testbenches and verification components, and contribute to regression infrastructure, coverage analysis, and closure.
- Triage bugs, perform root-cause analysis, and work with design teams to resolve issues.
What they ask for
- BS/MS in EE/CE/CS or equivalent, with 3+ years of hardware verification experience.
- Proven success verifying complex IP or SoC designs in industry-standard flows.
- Proficiency in SystemVerilog, UVM, and common simulation and debug tools.
- Strong knowledge of computer architecture, including memory/cache systems, coherency, interconnects, and/or ML compute primitives.
Nice to have
- Familiarity with performance modeling, formal verification, or emulation.
- Experience working in fast-paced, cross-disciplinary teams.
Pay
$226K – $445K (base salary)
Tools
SystemVerilog, UVM, VCS, Questa, Verdi
AI focus
Verifies custom silicon and ML accelerators designed to power frontier AI models.
Model-written summary · the original posting is authoritative