OpenAI
Physical Design Engineer
$225K–$485K
San Francisco · Full-time · Posted Sep 15, 2026
- Experience
- BS with 4+ years, MS with 2+ years, or PhD with 0–1 year(s) of relevant industry experience.
- Education
- BS, MS, or PhD
- Visa sponsorship
- Candidates may need to meet certain legal status requirements under U.S. export control laws and regulations.
About the job
Own physical design tools, flows, and implementation of floorplan blocks for next-generation AI accelerators, optimizing performance, power, and area through signoff.
What you'll do
- Develop and own physical implementation tools, flows, and methodologies.
- Implement floorplan blocks from floorplanning through final signoff.
- Collaborate with RTL designers, EDA vendors, and ASIC partners to optimize timing, power, and area.
What they ask for
- BS with 4+ years, MS with 2+ years, or PhD with 0–1 year of relevant industry experience in physical design and methodology development.
- Demonstrated success taping out complex silicon designs and hands-on block physical implementation and PPA convergence.
- Strong coding experience with python, bazel, and TCL; strong experience building physical design tools, flows, and methodologies.
- Strong understanding of microarchitecture, RTL design, physical design, circuit design, physical verification, and timing closure; deep familiarity with industry-standard physical synthesis, PNR, LEC, and power estimation tools and flows.
Nice to have
- Experience with AI- or HPC-focused chips.
- Experience optimizing PPA for high-performance compute cores or with top-level design methodologies.
Pay
$225K – $485K USD base salary
Tools
python, bazel, TCL, PNR, LEC
AI focus
Physical design of AI-native silicon and AI accelerators for advanced AI workloads.
Model-written summary · the original posting is authoritative