OpenAI
Research Engineer, AI for Chip Design
$380K–$500K
San Francisco · Hybrid · Full-time · Posted Sep 11, 2026
- Visa sponsorship
- Candidates may need to meet certain legal status requirements under U.S. export control laws and regulations.
About the job
Develop reinforcement-learning environments, evaluations, and tools that help AI models solve chip-design problems while maintaining correctness and improving performance.
What you'll do
- Build RL environments and evaluations for RTL generation, design verification, and physical-design optimization.
- Develop and evaluate methods for models to use chip-design tools and improve power, performance, and area while preserving correctness.
- Run experiments, investigate failures, and turn successful results into reusable research code and training workflows.
What they ask for
- Strong programming and debugging skills, with a record of turning technical ideas into working software.
- Experience with reinforcement learning, model evaluations, post-training, or other applied ML research.
- Experience building tool-using agents, reward functions, or automated evaluation systems.
- Ability to design experiments, interpret results, and work independently on ambiguous problems.
Nice to have
- Familiarity with experiment orchestration, distributed training, or research infrastructure.
- Experience with RTL, Verilog/SystemVerilog, EDA tools, formal verification, or chip-design automation.
Pay
$380K – $500K USD base salary
Tools
RL, RTL, Verilog/SystemVerilog, EDA tools
AI focus
Apply reinforcement learning, tool use, and evaluation to enable AI models to solve chip-design problems.
Model-written summary · the original posting is authoritative