Drimva

Positron

Emulation Test Engineer

$180K–$300K

Austin, TX · On-site · Full-time · Posted Jun 16, 2026

Experience
8+ years in ASIC Emulation or Verification; open to hiring at a more senior level.
Education
BS/MS in Electrical Engineering, Computer Engineering, or Computer Science.
Visa sponsorship
Candidates must currently be authorized to work in the U.S.; no new visa sponsorship is available, but H-1B transfers may be facilitated for eligible candidates.

About the job

Own pre-silicon emulation strategy for Positron’s AI inference ASIC, enabling validation, software bring-up, and performance analysis on Cadence Palladium.

What you'll do

  • Architect and optimize multi-rack Palladium models, including partitioning and compilation.
  • Build hybrid emulation and co-simulation environments for OS boot and AI workload testing; develop validation plans for interfaces and memory hierarchies.
  • Analyze power and performance, troubleshoot emulation tools with Cadence, and support hardware-software debugging.

What they ask for

  • 8+ years in ASIC Emulation or Verification, with significant experience on large-scale Palladium installations.
  • Mastery of SystemVerilog, Verilog, and C/C++ for transactor development and reference modeling.
  • Deep understanding of PCIe, DDR, and AMBA AXI/NoC.
  • BS/MS in Electrical Engineering, Computer Engineering, or Computer Science.

Pay

$180,000 – $300,000 USD base salary

Tools

Cadence Palladium (Z1/Z2/Z3), SCE-MI, DPI, Python, Tcl, Bash, Verdi, SimVision

AI focus

The role validates an AI inference ASIC and enables pre-silicon testing of AI workloads; it also analyzes performance and power.

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 4, 2026 (UTC)