Drimva

Quadric

Staff Deep Learning Compiler Engineer

$170K–$230K

USA · Remote · Staff · Full-time · Posted Oct 30, 2026

Experience
8+ years; no alternatives stated.
Education
BS, MS, or Ph.D. in Computer Science, Computer Engineering, Electrical Engineering, or a related field.
Visa sponsorship
Quadric participates in E-Verify to confirm employment eligibility for U.S.-based roles.

About the job

Design and optimize a deep learning compiler stack that translates neural-network models into efficient code for Quadric’s edge AI processor.

What you'll do

  • Build compiler passes and model-lowering pathways, and optimize generated code for performance, latency, memory use, and power.
  • Implement graph transformations and support new model architectures, operators, and primitives; benchmark and profile end-to-end performance.
  • Work with hardware teams on co-design, validation, simulators, and bring-up on FPGA and ASIC platforms.

What they ask for

  • BS, MS, or Ph.D. in Computer Science, Computer Engineering, Electrical Engineering, or a related field.
  • 8+ years of hands-on experience developing deep learning compilers or compiler infrastructures.
  • Strong proficiency in C++ (14/17/20) and Python, with solid data structures, algorithms, and object-oriented design fundamentals.
  • Familiarity with PyTorch, TensorFlow, or ONNX; understanding of deep learning operator representations and computer systems, memory hierarchies, parallel processing, and CPU/GPU/NPU instruction execution.

Nice to have

  • Experience with low-level kernel optimization, SIMD/vector programming, or memory allocation strategy development.
  • Knowledge of quantization and post-training/QAT optimization, or experience with custom AI accelerators, DSPs, embedded architectures, FPGA bring-up, hardware emulation, or cycle-accurate simulators.

Pay

$170,000 to $230,000 USD base salary

Tools

MLIR, Apache TVM, LLVM, PyTorch, TensorFlow, ONNX, C++, Python

AI focus

Develop compiler support and optimizations for neural-network inference on edge hardware, including model parsing, graph transformations, quantization, and performance tuning.

Model-written summary · the original posting is authoritative

First seen Oct 31, 2026 · Last verified Nov 5, 2026 (UTC)