Drimva

Quadric

Staff SoC Design Engineer

$170K–$230K

Burlingame, CA (HQ) · Hybrid · Staff · Full-time · Posted Oct 26, 2026

Experience
Minimum 5+ years of hands-on SoC/ASIC front-end design and integration experience.
Education
BS, MS, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
Visa sponsorship
Quadric participates in E-Verify to confirm employment eligibility for U.S.-based roles.

About the job

Design and integrate SoC subsystems for Quadric’s edge-AI processor, defining architecture and optimizing power, performance, area, and timing through tapeout.

What you'll do

  • Own SoC subsystem development and integrate third-party IP; contribute to SoC architecture and package design releases for customers.
  • Develop and drive SoC-level PPA optimization strategies, applying low-power design techniques.
  • Contribute to timing closure across front-end, back-end, and tapeout, balancing latency and throughput.

What they ask for

  • BS, MS, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
  • Minimum 5+ years of hands-on SoC/ASIC front-end design and integration experience.
  • Proficiency in SystemVerilog or Verilog.
  • Strong computer architecture and low-power digital design background; deep knowledge of at least one subsystem (Memory, I/O, or Compute), SoC subsystem/third-party IP experience, and working knowledge of VCS & Verilog/C Co-Simulation.

Nice to have

  • Experience in logic synthesis and performance modeling or FPGA design.
  • Familiarity with automotive safety standards (ASIL) and hardware security standards.

Pay

$170,000 to $230,000 USD base salary

Tools

SystemVerilog, Verilog, VCS, Verilog/C Co-Simulation, NoC, PCIe/UCIe, DDR

AI focus

Develop SoC hardware for a programmable edge-AI processor supporting neural network inference and conventional C++ code.

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 5, 2026 (UTC)