Analog/Mixed Signal ASIC Design Engineer

What you'll do

• Capture schematics, run simulations, and contribute to architecture definition and analog/digital partitioning.
• Collaborate with layout and digital teams.
• Support silicon bringup and debugging with the testing team.

What they ask for

• Bachelor’s degree in Electrical Engineering plus 2+ years of analog or mixed-signal IC design experience and 4+ years of ASIC design, verification, or related experience; OR a master’s degree in Electrical Engineering or related field plus 4+ years of ASIC design, verification, or related experience; OR a PhD in Electrical Engineering or related field plus 2+ years of ASIC design, verification, or related experience.
• 2+ years of experience using one or more design tools, such as CADENCE, SPICE, MATLAB, and/or Verilog/VHDL.
• Experience with ASIC design tools such as Cadence Virtuoso.
• Demonstrated interest in analog circuit design through coursework and/or work experience.

Nice to have

• Several years of industry experience in analog IC/system design, or experience designing high-speed mixed-signal IPs such as CTLE, CDR, PLL RXAFE, PLL, DAC, or ADC.
• Familiarity with Matlab and Python and understanding of mixed-signal architecture, systems, integration, yield, production, or signal processing.

Pay

$145,600.00 - $218,400.00 (base salary)

Tools

Cadence Virtuoso, CADENCE, SPICE, MATLAB, Verilog/VHDL, Matlab, Python

AI focus

Designs mixed-signal IP for products targeted for AI/ML applications; no specific AI/ML development work is described.