Qualcomm
ASICS Design Verification Engineer
$101K–$152K
San Diego, California · On-site · Full-time · Posted Oct 22, 2026
- Experience
- 1+ years required; preferred qualifications include 2+ years, with listed alternatives and skill areas.
- Education
- Bachelor's degree in Engineering, Science, or a closely related field; minimum qualifications also state Science, Engineering, or related field.
About the job
Develops and executes pre-silicon verification for digital power IP, from test planning and testbench development through coverage, formal verification, power-aware verification, and automation.
What you'll do
- Create pre-silicon test plans, testbenches, coverage, and assertion models for digital power IP.
- Perform formal verification and develop or deploy power-aware UPF verification flows and methodology.
- Develop automation to improve verification efficiency.
What they ask for
- Bachelor's degree in Engineering, Science, or a closely related field.
- 1+ years of experience with ASIC design and verification tools, techniques, and methodology.
Nice to have
- Master’s degree in a related field; 2+ years of relevant ASIC verification experience and associated skills in RTL, testbenches, verification methodologies, and scripting.
- Experience with AMBA Bus protocol (AXI/AHB/APB etc) or Assertion Based Formal Verification.
Pay
$101,400.00 - $152,200.00 (USD, base salary)
Tools
SystemVerilog-UVM, UPF, SystemVerilog, Verilog, VHDL, UVM, OVM, Perl
Model-written summary · the original posting is authoritative