Qualcomm
Camera DV Engineer
$155K–$233K
San Diego, California · On-site · Full-time · Posted Sep 17, 2026
- Experience
- Bachelor’s: 4+ years; Master’s: 3+ years; PhD: 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
- Education
- Bachelor’s, Master’s, or PhD in Computer Engineering, Computer Science, Electrical Engineering, or a related field.
About the job
Verifies camera imaging designs and pipelines by developing test benches, stimulus, and coverage flows, and builds AI-driven agentic workflows to improve verification productivity.
What you'll do
- Develop verification plans, test benches, constraints, and sequences for algorithm and pipeline tuning scenarios.
- Verify functionality and power/performance KPIs using simulation, formal, assertion, and emulation flows; debug issues across platforms.
- Collaborate across design, software, and firmware teams, document features, and implement AI-driven verification workflows.
What they ask for
- Experience defining design verification test plans and developing OOP-based verification infrastructure.
- Expertise in SystemVerilog testbenches using OVM/UVM.
- Experience developing directed and constrained-random stimulus.
- Strong digital design and debugging skills, including Verilog/System-Verilog RTL.
Pay
$155,400.00 - $233,200.00 USD base salary
Tools
System Verilog, OVM, UVM, Verilog, System-Verilog, Simulation, Formal, Emulation
AI focus
Design and implement AI-driven agentic workflows to enhance verification productivity.
Model-written summary · the original posting is authoritative