Qualcomm
CPU Integration & 3DIC CAD Engineer
$176K–$263K
Santa Clara, California · On-site · Full-time · Posted Sep 17, 2026
- Experience
- The posting lists 8 years of educational + industry experience; minimum alternatives are 4+ years with a bachelor’s, 3+ with a master’s, or 2+ with a PhD. Preferred: ten+ years of hands-on high-performance chip development.
- Education
- Bachelor’s, master’s, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field. Qualifications also lists a bachelor’s or master’s in Electrical Engineering or Computer Science.
About the job
Develops and supports CPU implementation and CAD flows, enabling multi-die and 3DIC integration while addressing performance, timing, extraction, and power-integrity needs.
What you'll do
- Enable 3DIC and multi-die capabilities in existing or new flows, including implementation and planning flows such as TSVs during floor planning.
- Support static timing, extraction, and power-integrity flows across multiple dies or chiplets; maintain flows and resolve project issues.
- Coordinate with worldwide design and CAD teams and EDA vendors on roadmaps and tool issues.
What they ask for
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field plus 4+ years of relevant work experience; OR master’s plus 3+ years; OR PhD plus 2+ years.
- The posting also states a total of 8 years of educational + industry experience.
- Bachelor’s or master’s degree in Electrical Engineering or Computer Science is also listed under Qualifications.
Nice to have
- Hands-on development of high-performance chips in a design or CAD role; experience with advanced technology nodes (5nm or lower).
- Experience with Innovus, Primetime, Star-RC or equivalents; high proficiency in Python and Tcl and knowledge of data structures.
Pay
$175,600.00 - $263,400.00 USD (pay range; salary)
Tools
3DIC, TSV’s, Innovus, Primetime, Star-RC, Python, Tcl
Model-written summary · the original posting is authoritative