Qualcomm
CPU Low Power RTL Design Engineer
$124K–$186K
Santa Clara, California · On-site · Full-time · Posted Oct 22, 2026
- Experience
- +3 years of RTL experience with a BS degree; no years specified with an MS degree.
- Education
- MS degree in Computer or Electrical Engineering, or BS degree in Computer or Electrical Engineering. Minimum qualifications also list a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
About the job
Develop CPU RTL and power architecture for high-performance, low-power devices, from early architectural exploration through design validation and physical implementation.
What you'll do
- Develop and specify power architecture, from high-level exploration to detailed specification.
- Develop and refine UPF and RTL designs to align power intent with RTL.
- Collaborate with cross-functional teams to implement and validate power-aware designs from RTL through physical implementation.
What they ask for
- MS degree in Computer or Electrical Engineering, or BS degree in Computer or Electrical Engineering with +3 years of RTL experience.
- Knowledge of Verilog and/or System Verilog, simulators, and waveform debugging tools.
- Knowledge of power intent and UPF format, with experience using UPF and Conformal Low Power analysis.
- Knowledge of logic design principles and their timing and power implications.
Nice to have
- Understanding of low-power microarchitecture techniques, physical implementation of RTL with power intent, or high-performance CPU microarchitecture trade-offs.
- Experience using a scripting language such as Perl or Python.
Pay
$124,300.00 - $186,500.00 (USD; base salary)
Tools
Verilog, System Verilog, UPF, Conformal Low Power, Perl, Python
Model-written summary · the original posting is authoritative