Qualcomm
CPU Micro-Architecture and RTL Design Engineer (RISC-V)
$176K–$263K
Santa Clara, California +1 · On-site · Full-time · Posted Oct 2, 2026
- Location
- Santa Clara, California
Austin, Texas - Experience
- Bachelor's: 4+ years; master's: 3+ years; PhD: 2+ years of related work experience.
- Education
- Bachelor's, master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
About the job
Develop and refine RISC-V CPU microarchitecture and RTL for high-performance, low-power devices, supporting verification and physical-design delivery.
What you'll do
- Explore CPU performance strategies and develop microarchitecture specifications with architecture and modeling teams.
- Own RTL development and refinement to meet power, performance, area, and timing goals; support functional and performance verification.
- Collaborate with cross-functional engineering teams to implement and validate physical design for timing, area, reliability, and testability.
What they ask for
- Knowledge of microprocessor architecture.
- Knowledge of Verilog and/or VHDL, including experience with simulators and waveform debugging tools.
- Knowledge of logic design principles and timing and power implications.
- Bachelor's degree in a related field and 4+ years of related work experience, or master's degree and 3+ years, or PhD and 2+ years.
Nice to have
- Understanding of low-power microarchitecture techniques and high-performance CPU design trade-offs.
- Experience with scripting languages such as Perl or Python.
Pay
$175,600.00 - $263,400.00 (base salary)
Tools
RISC-V, Verilog, VHDL, Perl, Python
Model-written summary · the original posting is authoritative