Qualcomm
CPU Physical Design CAD Engineer (Sr Staff)
$209K–$314K
Santa Clara, California +2 · On-site · Senior Staff · Full-time · Posted Oct 6, 2026
- Location
- Santa Clara, California
Austin, Texas
San Diego, California - Experience
- 6+ years with a bachelor's degree; 5+ years with a master's degree; or 4+ years with a PhD. Preferred: 10+ years of hands-on place-and-route experience.
- Education
- Bachelor's, master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
About the job
Build, maintain, and improve place-and-route CAD tools and flows for custom CPUs to help achieve strong power, performance, and area (PPA).
What you'll do
- Develop, integrate, and release features in the place-and-route CAD flow; recommend methodology improvements.
- Maintain, support, and debug implementation flows and resolve project-specific issues.
- Support CPU physical design teams and work with EDA vendors on methodology, roadmaps, and tool issues.
What they ask for
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of relevant work experience; OR master’s degree in a listed or related field and 5+ years; OR PhD in a listed or related field and 4+ years.
- High proficiency in Tcl and Python.
- Experience with physical design tasks, including place-and-route, analysis, timing sign-off, and PDV.
- Solid understanding of digital design, timing analysis, and physical verification.
Nice to have
- 10+ years of hands-on place-and-route experience with high-performance chips.
- Experience with 5nm-or-lower technology nodes and tools such as Cadence Innovus.
Pay
$209,300.00 - $313,900.00 USD (base salary)
Tools
Tcl, Python, Cadence Innovus
Model-written summary · the original posting is authoritative