Drimva

Qualcomm

CPU RTL/AI Micro-Architect - AI Development

$187K–$280K

Austin, Texas +1 · On-site · Full-time · Posted Sep 18, 2026

Location
Austin, Texas
Santa Clara, CA
Experience
6+ years with a bachelor’s degree, 5+ years with a master’s degree, or 4+ years with a PhD, in the listed engineering or related work areas.
Education
Bachelor’s, master’s, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.

About the job

Develop and integrate AI-assisted workflows into CPU RTL design, analysis, debugging, and engineering methodologies for datacenter-class CPUs.

What you'll do

  • Apply and extend internal AI tools and agent-based workflows for RTL productivity, code review, spec-to-RTL alignment, and debug.
  • Develop AI-assisted analysis to identify PPA tradeoffs, microarchitectural bottlenecks, and actionable design improvements.
  • Integrate AI capabilities into existing RTL toolchains and methodologies, collaborating across teams to scale workflows.

What they ask for

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of relevant work experience; OR master’s degree in one of those fields and 5+ years; OR PhD in one of those fields and 4+ years.

Nice to have

  • Knowledge of AI/LLM engineering tools and agent-based development, including prompting, chaining, and orchestration.
  • Experience with Verilog/SystemVerilog or VHDL RTL design, simulation and waveform debug, and CPU design techniques.

Pay

$186,700.00 - $280,100.00 (base salary)

Tools

Codex, Claude Code, Verilog, SystemVerilog, VHDL, lint, synthesis, simulation

AI focus

Use and extend agentic AI tools for RTL development, code quality analysis, specification alignment, automated debug, PPA and microarchitecture analysis, and integration into engineering workflows.

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)