Drimva

Qualcomm

CPU RTL Methodology Engineer

$209K–$314K

Santa Clara, California +1 · On-site · Full-time · Posted Sep 23, 2026

Location
Santa Clara, California
Austin, TX
Experience
Bachelor’s: 6+ years; Master’s: 5+ years; PhD: 4+ years of related work experience.
Education
Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.

About the job

Develops CPU RTL methodologies and automation to support design, debug, verification, and regression workflows across CPU engineering teams.

What you'll do

  • Develop methodologies and Python-based tools to improve RTL workflows, verification, and regression systems.
  • Support RTL development and debug, triage issues, and maintain RTL databases and repositories using version control.
  • Collaborate with CAD teams and contribute to CI/build systems; document workflows and best practices.

What they ask for

  • RTL design experience with Verilog/SystemVerilog and understanding of CPU microarchitecture.
  • Knowledge of RTL databases and GIT; ability to triage RTL issues and support design/debug workflows.
  • Advanced Python scripting skills and experience with CAD tools and automation frameworks in hardware design.
  • Bachelor’s degree in a related field and 6+ years, or Master’s degree and 5+ years, or PhD and 4+ years of related work experience.

Nice to have

  • Familiarity with TCL, Perl, or Bash.
  • Familiarity with CI/CD pipelines and RTL build systems.

Pay

$209,300.00 - $313,900.00 USD base salary

Tools

Verilog, SystemVerilog, GIT, Python, TCL, Perl, Bash, CI/CD

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)