Drimva

Qualcomm

CPU SRAM Design Engineer - Sr Staff / Principal

$187K–$280K

Austin, Texas · On-site · Senior Staff · Full-time · Posted Oct 2, 2026

Experience
The general qualifications state a BA/BS in Electrical Engineering with 12+ years of practical experience; preferred qualifications state an MS in Electrical Engineering with 10+ years. Minimum qualifications also list bachelor's degree and 6+ years, master's degree and 5+ years, or PhD and 4+ years in specified related fields/work.
Education
Electrical Engineering or a related field; minimum qualifications allow a bachelor's, master's, or PhD. The general qualifications specify a BA/BS in Electrical Engineering.

About the job

Designs, analyzes, and characterizes custom SRAM and register-file circuits for high-speed, low-power CPUs, and develops their deliverable models.

What you'll do

  • Develop custom digital circuits for high-speed, low-power SRAM designs, from schematic capture through layout planning and supervision.
  • Perform functional verification, simulation, margin verification, and timing characterization.
  • Generate memory collateral models and coordinate with CAD and Physical Design teams on model generation and memory PPA challenges.

What they ask for

  • Experience designing SRAM circuits.
  • Experience with industry-standard custom design tools and flows.
  • Experience with circuit simulation and Monte Carlo analysis.
  • Experience with static timing analysis.

Nice to have

  • Strong knowledge of SRAM and register-file techniques, advanced custom circuits, and high-performance, low-power design.
  • Experience with custom memory layout, memory analysis, Verilog models, BIST/DFT, or named tools including NanoTime, Ansys EMIR analysis, ESP-CV, and Liberate power analysis.

Pay

$186,700.00 - $280,100.00 (base salary)

Tools

NanoTime, Ansys EMIR analysis, ESP-CV, Liberate power analysis, Verilog, FinFet, Nanosheet

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)