Qualcomm
Data Center SoC Power & Limits Architect
$174K–$262K
San Diego, California +2 · On-site · Full-time · Posted Sep 23, 2026
- Location
- San Diego, California
Austin, TX
Santa Clara, CA - Experience
- 10+ years in power architecture, system architecture, or related domains; minimum qualifications also specify 6+ years with a bachelor’s, 5+ with a master’s, or 4+ with a PhD in related ASIC work.
- Education
- Bachelor's, master's, or PhD degree in Science, Engineering, or a related field; no equivalent-experience option stated.
About the job
Defines end-to-end power, thermal, and electrical limits architecture to sustain performance across data-center compute platforms under infrastructure constraints.
What you'll do
- Architect power budgeting, dynamic control, and limit enforcement across silicon, platforms, racks, and clusters.
- Set telemetry and system-integration requirements and coordinate cross-layer hardware/software design.
- Develop models and workload-driven analyses to validate architecture and optimize performance under power and thermal constraints.
What they ask for
- Deep expertise in power management, limits control, thermal/electrical constraints, and DVFS/DCVS, power capping, and control systems.
- Strong understanding of server/data-center architecture, power delivery networks, telemetry, sensors, and system monitoring.
- Experience with modeling and analysis tools such as MATLAB and Python.
- Meet one minimum qualification: bachelor’s degree and 6+ years, master’s degree and 5+ years, or PhD and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Pay
$174,400.00 - $261,600.00 USD base salary
Tools
DVFS/DCVS, MATLAB, Python, MATLAB/Simulink
AI focus
Architects AI-workload-aware power and limits management, including scaling AI/HPC performance and rack/cluster-level power orchestration.
Model-written summary · the original posting is authoritative