Drimva

Qualcomm

Digital Hardware Engineer, Senior

$130K–$194K

San Diego, California +1 · On-site · Senior · Full-time · Posted Oct 27, 2026

Location
San Diego, California
Boulder, Colorado
Experience
2+ years in FPGA or ASIC design and 2+ years with HDL languages and related tools; minimum-qualification alternatives are 2+ years of relevant work experience with a bachelor's degree, 1+ year with a master's degree, or a PhD.
Education
Bachelor's, master's, or PhD in Computer Science, Engineering, Information Systems, or a related field.

About the job

Develops and verifies FPGA/SOC digital hardware for a test base station used to verify mobile chipset functionality, with a focus on the coming 6GR physical layer.

What you'll do

  • Translate system requirements into efficient digital implementations and architect, implement, and verify FPGA/SOC designs.
  • Coordinate development milestones and deliverables with project leads, and present design reviews to cross-disciplinary teams.
  • Support commercialization of new hardware and features; work with Systems, RF, SW, and Test engineers.

What they ask for

  • 2+ years of FPGA or ASIC design experience spanning RTL/HDL, simulation, synthesis, and on-target verification.
  • 2+ years of experience with VHDL, Verilog, or System Verilog and related simulator/synthesis CAD tools.
  • Experience in HDL Design Verification (DV); understanding of high-speed interfaces and SOC interconnect standards.
  • Bachelor's degree in Computer Science, Engineering, Information Systems, or related field and 2+ years of relevant work experience; OR master's degree in one of these fields and 1+ year of relevant work experience; OR PhD in one of these fields.

Nice to have

  • Experience with common FPGA vendor tool suites, signal processing, digital communications, or wireless physical-layer specifications.
  • Experience with git or another version control system, Python, C/C++, Matlab, Agentic AI frameworks and workflows, HLS, or embedded software.

Pay

$129,500.00 - $194,300.00 USD base salary

Tools

FPGA, ASIC, RTL/HDL, VHDL, Verilog, System Verilog, PCIe, Ethernet

AI focus

Familiarity with Agentic AI frameworks and workflows to enhance productivity and quality is preferred.

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)