Drimva

Qualcomm

Director of Engineering for ML hardware design & Architecture

$228K–$343K

San Diego, California · On-site · Director · Full-time · Posted Sep 17, 2026

Experience
MS degree and 15+ years of industry experience are stated; a separate minimum qualification lists Bachelor's degree and 8+ years, Master's degree and 7+ years, or PhD and 6+ years of related work experience.
Education
MS degree required in the role-specific qualifications; the separate minimum qualifications list Bachelor's, Master's, or PhD in Computer or Electrical Engineering, Computer Science, or a related field.

About the job

Leads the architecture and development of next-generation ML hardware accelerators, particularly for computer vision applications in mobile and emerging products.

What you'll do

  • Architect and optimize ML accelerator designs for performance, power, and area; define hardware micro-architecture for ML algorithms.
  • Lead HW IP development with RTL design, verification, synthesis, and physical design teams, using models and hardware to validate decisions.
  • Coordinate with hardware, software, systems, and product teams to deliver ML solutions and communicate technical results.

What they ask for

  • Experience developing hardware for ML, multimedia, or accelerator technologies and with SoC or chipset development.
  • Familiarity with OS principles, HW/SW interaction, SoC bus, interconnect, and memory technologies.
  • MS degree and 15+ years of industry experience in relevant areas.
  • Experience in one or more of: ML or multimedia architecture, ML frameworks or accelerator standards, VLSI design and verification, C/C++/SystemC, performance/power modeling, or scripting and automation.

Nice to have

  • Deep knowledge of ML for vision.
  • Experience with synthesis and physical design teams, global collaboration, or technical and people leadership.

Pay

$228,400.00 - $342,600.00 (base salary)

Tools

TensorFlow Lite, ONNX, Verilog, SystemVerilog, HLS, C/C++, SystemC

AI focus

Architects and optimizes ML hardware accelerators, especially for computer vision workloads such as image classification, object detection, and video analytics.

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)