Qualcomm
EDA/CAD SW Engineer (Multiple Levels)
$146K–$218K
San Diego, California · On-site · Full-time · Posted Sep 17, 2026
- Experience
- 2+ years in each of the listed areas; alternatives are stated for ASIC/FPGA/verification work and C++/CAD tool development.
- Education
- Bachelor's degree in Science, Engineering, or related field.
About the job
Develop CAD tools, algorithms, and infrastructure for emulation and VLSI design, including optimization of compute and storage resources.
What you'll do
- Develop emulation CAD algorithms for synthesis, partitioning, place and route, and clock optimization.
- Build solutions for CAD infrastructure needs and drive compute and storage optimization.
- Mentor and lead team members.
What they ask for
- Bachelor's degree in Science, Engineering, or related field.
- 2+ years in ASIC design, FPGA design, verification, or related work experience.
- 2+ years in C++ SW development, CAD tool development, or related work experience.
- 2+ years of hands-on experience with Linux and direct hands-on CAD SW development experience.
Nice to have
- Master's or PhD. in Computer Science, Computer Engineering.
- Experience with RTL synthesis, clock tree optimization, VLSI design concepts, logic design, Git, LSF, JIRA, or GCC.
Pay
$145,600.00 - $218,400.00 USD base salary
Tools
C++, Linux, Git, LSF, JIRA, GCC, System Verilog
Model-written summary · the original posting is authoritative