Qualcomm
GPU Design Integration Engineer
$204K–$306K
San Diego, California · On-site · Full-time · Posted Sep 17, 2026
- Experience
- 5+ years of ASIC design, verification, or related work experience stated in Minimum Skills. Minimum Qualifications also lists: bachelor's degree and 6+ years, master's degree and 5+ years, or PhD and 4+ years of related work experience.
- Education
- Bachelor's degree in Science, Engineering, or related field. Minimum Qualifications specifies a bachelor's, master's, or PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field, with the corresponding experience alternatives.
About the job
Designs and integrates IP for GPUs, including architecture, RTL, synthesis, verification, and integration of complex blocks into complete GPUs.
What you'll do
- Develop architecture and micro-architecture for integration-related IP; implement RTL and synthesis.
- Perform logic and timing verification, including functional ECO implementation.
- Integrate complex IP and coordinate with software, power, and design teams.
What they ask for
- Strong SoC and/or IP-level design-block integration experience.
- RTL expertise in SystemVerilog, including use of frontend tools such as Lint and CDC.
- Experience in logic design, micro-architecture, RTL coding, multi-clock design, synthesis, and ASIC timing concepts.
- Ability to work independently across projects and communicate and coordinate effectively in a team.
Nice to have
- Familiarity with AMBA protocols (AXI, AHB, APB), clocking/reset/debug architecture, Python scripting, or low-power design.
- GPU and/or multimedia IP development experience.
Pay
$203,700.00 - $305,500.00 (pay range; salary/base pay)
Tools
SystemVerilog, Lint, CDC, AMBA, AXI, AHB, APB, Python
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