Qualcomm
Memory Control Design Engineer
$122K–$183K
San Diego, California · On-site · Full-time · Posted Sep 17, 2026
- Experience
- 3–8 years; minimum qualifications also specify 2+ years with a bachelor’s degree, 1+ year with a master’s degree, or a PhD.
- Education
- Bachelor’s, Master’s, or PhD in Science, Engineering, or a related field.
About the job
Designs and delivers high-speed DDR memory controller ASICs for Qualcomm products, from architecture and RTL through integration, timing closure, and power analysis.
What you'll do
- Develop design specifications and microarchitecture; implement and deliver RTL for memory controllers.
- Debug designs and support integration; perform synthesis, timing closure, physical design support, gate-level simulation, and power analysis.
- Contribute to C/C++ modeling and improve design methodologies.
What they ask for
- Experience with DDR controller architectures, especially front ends interfacing to CPU, DSP, and multimedia processors.
- Experience with x86 or ARM CPU/bus architectures.
- Bachelor’s degree in Science, Engineering, or related field plus 2+ years of relevant ASIC work; or Master’s degree plus 1+ year; or PhD in a related field.
Pay
$121,800.00 - $182,600.00 USD (base salary)
Tools
DDR, LPDDR, PCDDR, RTL, C/C++, x86, ARM
Model-written summary · the original posting is authoritative