Drimva

Qualcomm

Memory Designer

$174K–$262K

San Diego, California · On-site · Full-time · Posted Sep 17, 2026

Experience
2+ years of academic or professional experience designing embedded memories for SoC applications. Minimum qualifications also state 6+ years with a bachelor's degree, 5+ years with a master's degree, or 4+ years with a PhD in ASIC design, verification, validation, integration, or related work.
Education
Master's degree or PhD in Science or Engineering; minimum qualifications also list a bachelor's, master's, or PhD in Science, Engineering, or a related field.

About the job

Designs and implements low-power, high-performance, area-efficient embedded memory circuits and architectures for Qualcomm Snapdragon products.

What you'll do

  • Develop custom digital circuits for high-speed, low-power SRAM designs; capture schematics, simulate major blocks, and verify margins.
  • Plan and supervise layouts, and work with the CAD team on verification and model generation.
  • Coordinate with SoC teams to define memory PPA targets.

What they ask for

  • 2+ years of academic or professional experience designing embedded memories for SoC applications.
  • Knowledge of CPU L1/L2 cache design, compiler SRAM/Register File architectures, custom circuit implementations, and high-performance, low-power design techniques.
  • Knowledge of semiconductor device fundamentals and variation-aware design in nanomenter CMOS & FinFet technology nodes.
  • Experience with tight pitch-matched memory layout designs and understanding of physical implementation impacts on circuit performance.

Pay

$174,400.00 - $261,600.00 (base salary)

Tools

SRAM, CPU L1/L2 cache, Compiler SRAM/Register File architectures, CMOS, FinFet

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)