Drimva

Qualcomm

Memory Designer

$122K–$183K

San Diego, California · On-site · Full-time · Posted Oct 7, 2026

Experience
Minimum: 2+ years with a bachelor’s degree, 1+ year with a master’s degree, or no stated experience minimum with a PhD. Preferred: 3+ years ASIC-related experience; 2+ years with architecture and design tools, scripting tools and programming languages, and design verification methods.
Education
Bachelor’s, master’s, or PhD in Science, Engineering, or a related field; preferred master’s in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.

About the job

Designs and develops ASIC IP and systems, from architecture and modeling through implementation, verification, and documentation.

What you'll do

  • Define, design, optimize, verify, validate, implement, and document ASIC IP development.
  • Create architectures, circuit specifications, logic designs, and system simulations from system requirements.
  • Coordinate with cross-functional teams and evaluate design flows, including synthesis, place and route, timing, power, and verification.

What they ask for

  • Bachelor’s degree in Science, Engineering, or a related field and 2+ years of relevant ASIC experience; or Master’s degree in Science, Engineering, or a related field and 1+ year of relevant ASIC experience; or PhD in Science, Engineering, or a related field.

Nice to have

  • Master’s degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
  • Experience with ASIC design or verification, architecture and design tools, scripting and programming languages, or design verification methods.

Pay

$121,800.00 - $182,600.00 USD base salary

Tools

RTL to GDS Flow, Virtuoso

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 4, 2026 (UTC)