Drimva

Qualcomm

Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development

$162K–$244K

San Diego, California · On-site · Full-time · Posted Sep 30, 2026

Experience
4+ years with a Bachelor’s degree, 3+ years with a Master’s degree, or 2+ years with a PhD; preferred qualifications also state 5+ years of relevant industry experience with a BS or MS degree.
Education
Bachelor’s, Master’s, or PhD in Computer Engineering, Computer Science, Electrical Engineering, or a related field.

About the job

Design next-generation wireless modem hardware by defining architecture, developing RTL, and optimizing area, power, and performance using AI-driven methodologies.

What you'll do

  • Define specifications and architecture/micro-architecture, develop RTL, and optimize designs for area, power, and performance.
  • Collaborate with hardware teams and system, RF, firmware, and software teams to deliver silicon.
  • Use GenAI, ML-assisted flows, and agentic-AI automation to accelerate project phases.

What they ask for

  • Bachelor’s degree in a related field and 4+ years of relevant work experience; or Master’s degree and 3+ years; or PhD and 2+ years.
  • Strong expertise in RTL coding and logic design for wireless modem ASICs or custom DSP datapath components.
  • Understanding of Verilog, SystemVerilog, C/C++, and SystemC.
  • Experience with synthesis, LINT, clock domain crossing, low power design, and verification.

Nice to have

  • Relevant industry experience of 5+ years with a BS or MS degree.
  • Knowledge of 4G/5G 3GPP physical layer standards; experience with ultra-deep sub-micron CMOS nodes such as 4nm and below, or Generative AI, ML, or agentic-AI-based automation.

Pay

$162,500.00 - $243,700.00 USD (base salary)

Tools

RTL, Verilog, SystemVerilog, C/C++, SystemC, Python/Perl, Unix/Linux, Makefiles

AI focus

Apply GenAI, ML-assisted flows, and agentic-AI automation frameworks to accelerate modem hardware development.

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)