Qualcomm
NPU RTL Design Engineer
$134K–$201K
San Diego, California · On-site · Full-time · Posted Oct 22, 2026
- Experience
- 2+ years of high-performance microprocessor design; general work experience alternatives are 2+ years with a bachelor’s degree, 1+ year with a master’s degree, or none specified with a PhD.
- Education
- Bachelor’s, master’s, or PhD in Electrical Engineering, Computer Science, Computer Engineering, or a related field.
About the job
Designs and integrates RTL for Hexagon/NPU logic blocks, supporting frontend checks, timing closure, verification, and area and power optimization.
What you'll do
- Define block and subsystem micro-architecture with the system architecture team, and develop RTL for SoC integration.
- Run frontend checks and collaborate on design constraints, timing closure, verification, and hardware integration.
- Optimize area and power, and contribute ideas for ASICs, IP cores, and design flows.
What they ask for
- Bachelor’s degree in a related field and 2+ years of relevant work experience; or a master’s degree and 1+ year; or a PhD in a related field.
- 2+ years of experience with high-performance microprocessor design.
Nice to have
- Practical RTL development experience, including SystemVerilog, design partitioning, simulation/regression, and collaboration with design verification.
- Experience with processor integration, bus interfaces, or computer architecture; familiarity with tools such as linting, CDC, LEC, and CLP.
Pay
$133,900.00 - $200,900.00 (USD; pay range; base salary or total pay not specified)
Tools
RTL, System Verilog, Verilog, linting, CDC, LEC, CLP, PLDRC
AI focus
Designs Hexagon/NPU cores that support AI applications; the role focuses on RTL and ASIC design rather than AI model development.
Model-written summary · the original posting is authoritative