Qualcomm
Physical Design Engineer (Engineer up to Principal Level)
$123K–$250K
San Diego, California +2 · On-site · Principal · Full-time · Posted Sep 17, 2026
- Location
- San Diego, California
Austin, Texas
Santa Clara, California - Experience
- Minimum qualifications list alternatives: Bachelor’s degree plus 4+ years, Master’s degree plus 3+ years, or PhD plus 2+ years of relevant experience. Level-specific industry experience: Engineer 2+ years; Senior Engineer 4+ years; Staff Engineer 8+ years; Senior Staff Engineer 12+ years; Principal Engineer 15+ years.
- Education
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
About the job
Implements and signs off advanced ASIC and SoC physical designs, from synthesis through tapeout, including timing closure, optimization, and design automation.
What you'll do
- Perform physical implementation and signoff activities, including floorplanning, power planning, placement, clock tree synthesis, routing, timing closure, and physical verification.
- Resolve power, performance, congestion, signal-integrity, and design-closure challenges; develop methodologies and automation.
- Collaborate with cross-functional teams and provide technical leadership appropriate to the role’s level.
What they ask for
- Bachelor’s degree in a related technical field and relevant ASIC or related engineering experience.
- Experience with digital ASIC physical implementation methodologies and understanding of power, performance, area, timing, and physical-design tradeoffs.
- Experience in Linux/Unix environments.
- Programming or scripting experience using Python, Tcl, Perl, Shell, or similar languages.
Nice to have
- Experience with the complete physical design flow from synthesis through tapeout; experience with Cadence Innovus and/or Synopsys Fusion Compiler.
- Static timing analysis and timing closure using Synopsys PrimeTime; knowledge of MMMC methodologies and advanced-node design closure.
Pay
$123,100.00 to $250,000.00 USD (annual base salary); ₹0.00 - ₹0.00 INR (pay range; pay type not specified)
Tools
Linux/Unix, Python, Tcl, Perl, Shell, Cadence Innovus, Synopsys Fusion Compiler, Synopsys PrimeTime
AI focus
Supports SoC programs that include AI; no specific AI development responsibilities are stated.
Model-written summary · the original posting is authoritative