Qualcomm
Physical Design Engineer, Staff
$146K–$218K
Austin, Texas · On-site · Staff · Full-time · Posted Sep 17, 2026
- Experience
- Bachelor’s: 4+ years; Master’s: 3+ years; PhD: 2+ years in ASIC design, verification, validation, integration, or related work. Preferred: 6+ years in those areas; also preferred: 2+ years with architecture and design tools, scripting tools and programming languages, or design verification methods; 1+ year interacting with senior leadership.
- Education
- Bachelor’s, Master’s, or PhD in Science, Engineering, or related field.
About the job
Designs, implements, optimizes, and verifies ASIC IP, blocks, and SoCs, coordinating across teams to meet system requirements.
What you'll do
- Define, design, optimize, verify, implement, and document ASIC IP and SoC development.
- Evaluate design flows including synthesis, place and route, timing, power, and verification.
- Collaborate with cross-functional teams on implementation strategy and system requirements.
What they ask for
- Bachelor’s degree in Science, Engineering, or related field, or a Master’s or PhD in those fields.
- ASIC design, verification, validation, integration, or related work experience.
Nice to have
- Master’s degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
- Experience with architecture and design tools, scripting and programming languages, design verification methods, or interaction with senior leadership.
Pay
$145,600.00 - $218,400.00 USD base salary
Tools
RTL to GDS Flow, Virtuoso
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