Pre-Silicon Validation Engineer

What you'll do

• Develop and maintain ASIC/FPGA emulation environments and port RTL designs to emulation or FPGA prototyping platforms.
• Build verification infrastructure and Python automation; analyze waveforms and debug functional, performance, and system-level issues.
• Collaborate across design and software teams, apply AI-assisted engineering tools, and document and present findings.

What they ask for

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field; the posting also lists a bachelor's degree in Science, Engineering, or a related field.
• Experience in ASIC verification, FPGA prototyping, or hardware emulation.
• Strong expertise in SystemVerilog, C/C++, Linux and shell scripting, Python, and ASIC/FPGA emulation platforms.
• Experience with RTL debugging, waveform analysis, and design verification; knowledge of SoC architectures, bus protocols, and hardware/software interactions.

Nice to have

• Experience with Cadence Palladium, Protium, Siemens Veloce, or Synopsys ZeBu; familiarity with Xilinx or Intel FPGA implementation flows.
• Exposure to AI/ML technologies or AI-powered engineering tools; knowledge of high-speed interfaces or cloud-based compute and large-scale regression management.

Pay

$101,400.00 - $152,200.00 USD base salary

Tools

SystemVerilog, C/C++, Linux, Python, Cadence Palladium, Siemens Veloce, Synopsys ZeBu, Xilinx

AI focus

Apply AI-assisted tools and techniques to accelerate verification, debug, data analysis, and engineering productivity; AI/ML exposure is preferred.