Drimva

Qualcomm

RFIC Design Engineer

$112K–$167K

San Diego, California · On-site · Full-time · Posted Sep 22, 2026

Experience
Bachelor's path: 3+ years designing RF/analog circuits for wireless products; master's path: no years stated. 2+ years using at least two listed software tools. Preferred experience includes 3+ years in transistor-level RF analog IC design or 2+ years in one or more specified areas, or 1+ year in a large matrixed organization.
Education
Bachelor's degree in Electrical Engineering, or master's degree in Electrical Engineering or a related field.

About the job

Designs, simulates, and verifies RF integrated-circuit blocks for wireless transceivers and related applications.

What you'll do

  • Contribute to architecture and transistor-level design of RFIC blocks; run circuit simulations.
  • Support circuit floor planning, layout generation, and physical verification with layout engineers.
  • Write basic test plans, assess results, debug issues, and use neural networks for circuit optimization and analysis.

What they ask for

  • Bachelor's degree in Electrical Engineering and 3+ years designing RF/analog circuits for wireless products, or a master's degree in Electrical Engineering or a related field.
  • 2+ years of academic or professional experience using at least two of CADENCE, Virtuoso, and ADS.

Nice to have

  • 3+ years of transistor-level RF analog integrated-circuit design experience with a master's degree in Electrical Engineering.
  • 2+ years in one or more listed areas, including RF/analog receiver or transmitter circuits, RF frequency synthesizers, digital control and signal processing, product commercialization, or electromagnetic simulation/modeling; or 1+ year in a large matrixed organization.

Pay

$111,600.00 - $167,400.00 (base salary)

Tools

CADENCE, Virtuoso, ADS, Neural Networks

AI focus

Use of neural networks for circuit optimization and analysis.

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 4, 2026 (UTC)