Drimva

Qualcomm

Senior Emulation Performance Methodology & Debug Engineer

$122K–$183K

San Diego, California +4 · On-site · Senior · Full-time · Posted Oct 16, 2026

Location
San Diego, California
Austin, Texas
Folsom, California
Hillsboro, Oregon
Santa Clara, California
Experience
Minimum: Bachelor's degree and 2+ years; OR Master's degree and 1+ year; OR PhD. Preferred: 5+ years in emulation and silicon environments.
Education
Bachelor's, Master's, or PhD in Science, Engineering, or related field.

About the job

Develops and supports SoC pre-silicon emulation platforms, methodologies, and debug for ASIC designs.

What you'll do

  • Develop and deploy uniform emulation build-generation and debug methodologies across FPGA-based platforms.
  • Support pre-silicon prototyping, enablement, bring-up, and debug of SoC designs and emulation hardware/software.
  • Collaborate across sites and with vendors, architects, designers, verification and software engineers, and customers.

What they ask for

  • Bachelor's degree in Science, Engineering, or related field and 2+ years of relevant ASIC work; OR a Master's degree and 1+ year; OR a PhD.
  • Expertise in Verilog / SystemVerilog.
  • Proficiency in Python and TCL scripting.
  • Experience with C programming.

Nice to have

  • 5+ years of experience working in emulation and silicon environments.
  • Experience with FPGA platforms and tools, timing closure, JTAG, and kernel debuggers.

Pay

$121,800.00 - $182,600.00 USD base salary

Tools

FPGA Prototyping, Veloce, Palladium, Verilog, SystemVerilog, C, Python, TCL

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 4, 2026 (UTC)