Drimva

Qualcomm

Senior HSIO Bench Test Engineer

$118K–$177K

San Diego, California · On-site · Senior · Full-time · Posted Sep 17, 2026

Experience
5+ years in High Speed Silicon Validation. The posting also lists minimum-qualification alternatives: 2+ years of Hardware Engineering or related work experience with a bachelor's degree; 1+ year with a master's degree; or a PhD. Preferred: 3+ years of experience in related areas.
Education
Bachelor's degree in Electronics/Electrical/Computer Engineering or related field. Minimum qualifications also allow a master's degree or PhD in a listed or related field.

About the job

Develops and executes post-silicon test, characterization, and validation for Qualcomm high-speed interfaces, including first-silicon bring-up, debug, and customer issue resolution.

What you'll do

  • Define and execute test methodologies and characterization plans for high-speed SERDES interfaces; analyze performance across operating conditions.
  • Bring up and debug first silicon, validate electrical compliance, and support package and board power- and signal-integrity debugging.
  • Collaborate with design, systems, customer engineering, and hardware applications teams on chip bring-up and customer/RMA issues.

What they ask for

  • Bachelor's degree in Electronics/Electrical/Computer Engineering or a related field.
  • 5+ years in High Speed Silicon Validation.
  • Minimum qualifications also specify a bachelor's degree in a listed or related field and 2+ years of Hardware Engineering or related work experience, or a master's degree and 1+ year, or a PhD.
  • Strong problem-solving and debugging skills; effective communication, organization, and teamwork.

Nice to have

  • Master's degree in Electronics/Electrical/Computer Engineering or a related field; 3+ years of experience in related areas.
  • High-speed test and characterization, SERDES, lab equipment, Python/C# test automation, and board design familiarity.

Pay

$117,800.00 - $176,600.00 (USD; pay range; salary)

Tools

PCIe, USB4, UFS, DP, MIPI(DSI,CSI), Oscilloscopes, TDRs/VNAs, J-BERT

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)