Drimva

Qualcomm

Senior Performance Engineer

$122K–$183K

Austin, Texas · On-site · Senior · Full-time · Posted Sep 23, 2026

Experience
Minimum: 2+ years with a bachelor’s degree, 1+ year with a master’s degree, or no experience minimum stated with a PhD. Preferred: 3+ years of relevant ASIC experience; 2+ years each with architecture and design tools, scripting tools and programming languages, and design verification methods.
Education
Bachelor’s, master’s, or PhD in Science, Engineering, or a related field; preferred master’s in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.

About the job

Develops and optimizes ASIC IP and SoC designs, evaluating implementation flows and collaborating across teams to meet system requirements.

What you'll do

  • Define, design, verify, implement, and document ASIC IP or SoC development.
  • Create architectures, circuit specifications, logic designs, and system simulations from system requirements.
  • Evaluate design flows, including synthesis, place and route, timing, power, and verification.

What they ask for

  • Bachelor’s degree in Science, Engineering, or a related field and 2+ years of relevant ASIC experience; or a master’s degree in those fields and 1+ year; or a PhD in those fields.

Nice to have

  • Master’s degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
  • Experience with ASIC design and verification, architecture and design tools, scripting and programming languages, and design verification methods.

Pay

$121,800.00 - $182,600.00 (USD, base salary)

Tools

RTL to GDS Flow, Virtuoso

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 4, 2026 (UTC)