Qualcomm
Senior SOC Physical Design Engineer
$131K–$173K
San Diego, California · On-site · Senior · Full-time · Posted Sep 17, 2026
- Education
- Master's Degree (or foreign academic equivalent) in Electrical Engineering, Computer Engineering, Computer Science or related degree field.
About the job
Plans and executes SoC physical design and verification flows, optimizing power and performance and driving designs to tapeout signoff.
What you'll do
- Perform floor planning, clock tree synthesis, place and route, PDN, and timing analysis and closure.
- Run chip- and block-level physical verification checks, including LVS, DRC, design-for-manufacturing, and design-for-yield.
- Coordinate schedules and cross-functional engineering support for signoff closure; contribute to design reviews and project meetings.
Pay
$131,175.00 - $173,400.00/year (base salary)
Tools
Floor Planning, Clock Tree Synthesis, Place and Route, PDN, LVS, DRC
Model-written summary · the original posting is authoritative