Drimva

Qualcomm

Senior Software Engineer — RISC-V Instruction Set Simulator (Simulator Engineer)

$176K–$263K

Cupertino, California · On-site · Senior · Full-time · Posted Oct 2, 2026

Experience
Bachelor's degree: 4+ years; master's degree: 3+ years; PhD: 2+ years in Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work.
Education
Bachelor's, master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.

About the job

Build and maintain a high-performance RISC-V instruction set simulator used as a reference for processor verification and pre-silicon software development.

What you'll do

  • Implement RISC-V extensions and maintain simulator execution, memory protection, virtual memory, and privilege logic.
  • Develop the ISS/RTL co-simulation harness and targeted specification-based unit tests.
  • Maintain simulator extensions and developer utilities.

What they ask for

  • Solid C++ skills and ability to read unfamiliar codebases.
  • Basic processor architecture knowledge, including pipelines, memory, privilege levels, and interrupts.
  • Attention to detail and willingness to translate specifications into tested code.
  • Some low-level or systems programming exposure, such as embedded systems, operating systems, compilers, or hardware description.

Nice to have

  • Experience with RISC-V, x86, or ARM; simulators or emulators such as QEMU, Spike, or gem5.
  • Experience with GDB, ELF binaries, bare-metal bring-up, hardware verification, RTL co-simulation, Linux internals, or Python 3+.

Pay

$175,600.00 - $263,400.00 USD base salary

Tools

C++, RISC-V, QEMU, Spike, gem5, GDB, ELF, Python 3+

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)