Drimva

Qualcomm

Senior Staff Formal Verification Engineer

$204K–$306K

San Diego, California +2 · On-site · Senior Staff · Full-time · Posted Sep 17, 2026

Location
San Diego, California
Austin, Texas
Santa Clara, California
Experience
Bachelor's degree: 6+ years; master's degree: 5+ years; PhD: 4+ years in Software Engineering, Hardware Engineering, Systems Engineering, or related work.
Education
Bachelor's, master's, or PhD in Computer Engineering, Computer Science, Electrical Engineering, or a related field.

About the job

Develop formal verification methods for next-generation GPU designs, focusing on graphics hardware features, RTL, and verification sign-off.

What you'll do

  • Identify graphics areas for formal verification and develop FPV test plans, assertion-based testbenches, and formal sign-off matrices.
  • Debug RTL, resolve proof complexity using abstraction techniques, and drive bug hunting and coverage closure.
  • Collaborate with GPU architecture, RTL design, and DV teams, and engage EDA vendors on verification methodologies.

What they ask for

  • Proficiency with industry-standard formal tools and hands-on experience writing SystemVerilog Assertions.
  • Experience developing formal verification strategies and testbenches, debugging RTL, applying abstraction techniques, and achieving coverage closure and sign-off.
  • Strong communication skills and ability to learn, improve, and deliver.

Nice to have

  • Prior knowledge of GPU architecture.
  • Experience with formal applications such as DPV, C2RTL SEQ, or RTL2RTL SEQ.

Pay

$203,700.00 - $305,500.00 USD base salary

Tools

Formal Property Verification (FPV), SystemVerilog Assertions, DPV, C2RTL SEQ, RTL2RTL SEQ

AI focus

The role verifies GPU designs that support enhanced AI processing; no direct AI development duties are stated.

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)