Qualcomm
SoC Architecture - IP Power
$146K–$218K
San Diego, California · On-site · Full-time · Posted Sep 28, 2026
- Experience
- Qualifications state either a bachelor's degree and 7+ years of ASIC design, verification, or related work; a master's degree and 5+ years of ASIC design, architecture, or related work; or minimum qualifications of a bachelor's degree and 4+ years, a master's degree and 3+ years, or a PhD and 2+ years of related ASIC work experience.
- Education
- Bachelor's, master's, or PhD in Science, Engineering, or a related field. No equivalent-experience alternative stated.
About the job
Analyzes power estimates for SoC infrastructure IP, identifies architectural and micro-architectural limitations, and proposes fixes or optimizations for robust product deployment.
What you'll do
- Coordinate with hardware designers to gather and analyze power estimates for SoC infrastructure IP.
- Identify architectural and micro-architectural bugs or limitations and propose fixes or optimizations.
- Coordinate with domain leads on infrastructure deployment plans based on product requirements.
What they ask for
- Robust understanding of computer architecture.
- Experience in system power architecture/design and exposure to power estimation flows.
- Basic understanding of end-to-end ASIC design flows.
- Knowledge of SoC and infrastructure IP hardware architecture, such as NOC, SMMU, and caches.
Nice to have
- Exposure to Quality of Service, clocks, power management, security, debug architectures, and their software interfaces.
- Knowledge of industry-standard interconnect and IO-device protocols; understanding of hardware-software interfaces and firmware; or post-silicon flows and debug.
Pay
$145,600.00 - $218,400.00 USD base salary
Tools
ASIC, NOC, SMMU
Model-written summary · the original posting is authoritative