Qualcomm
SoC Debug Engineer, Senior Staff
$174K–$262K
San Diego, California +4 · On-site · Senior Staff · Full-time · Posted Oct 16, 2026
- Location
- San Diego, California
Austin, Texas
Folsom, California
Hillsboro, Oregon
Santa Clara, California - Experience
- The posting states 9+ years for pre-silicon and post-silicon enabling and platform failure analysis. It also lists alternatives for related ASIC work: Bachelor's degree plus 6+ years, Master's degree plus 5+ years, or PhD plus 4+ years.
- Education
- Required: Master's in Computer Engineering and/or Electrical Engineering. The posting also lists a Bachelor's, Master's, or PhD in Science, Engineering, or a related field, with the stated experience alternatives.
About the job
Leads pre-silicon and post-silicon SoC bring-up and platform-level debugging for server, compute, and mobile chipsets, identifying root causes and improving failure triage.
What you'll do
- Lead bring-up, failure analysis, and root-cause debugging across pre-silicon and post-silicon phases, including RTL inspection and JTAG-based investigation.
- Develop debug strategies and initiatives to isolate failing system components and help partners triage PVT and marginality issues faster.
- Troubleshoot server hardware and investigate manufacturing defects, implementing corrective actions to improve product quality and reliability.
What they ask for
- 9+ years of experience with pre-silicon and post-silicon enabling, bring-up, and embedded-platform failure analysis.
- RTL inspection and understanding of basic RTL; experience solving complex debug problems in pre-silicon and post-silicon phases.
- Experience leading platform-level debug improvements and creating partner debug strategies.
- Experience debugging low-level software and hardware issues, using JTAG, and operating lab equipment such as logic analyzers, oscilloscopes, and signal generators.
Nice to have
- Programming or scripting experience in C, Assembly, Perl, or Python; understanding of power and performance.
- Knowledge of TCU, PVT, Fmax, and Vmin test methodology, server use cases, or multi-die secure boot.
Pay
$174,400.00 - $261,600.00 USD base salary
Tools
RTL, JTAG, C, Assembly, Perl, Python, TCU, PVT
Model-written summary · the original posting is authoritative