Drimva

Qualcomm

SOC Design Verification Engineer-Staff

$146K–$218K

San Diego, California · On-site · Staff · Full-time · Posted Sep 17, 2026

Experience
4+ years with a bachelor’s degree, 3+ years with a master’s degree, or 2+ years with a PhD in ASIC design, verification, validation, integration, or related work. Preferred: 6+ years in these areas.
Education
Bachelor’s, master’s, or PhD in Science, Engineering, or a related field.

About the job

Defines, verifies, and implements complex ASIC IP and SoC designs, collaborating across teams to meet system requirements and customer needs.

What you'll do

  • Define, model, design, verify, validate, implement, and document IP (block/SoC) development.
  • Create architectures, circuit specifications, logic designs, and system simulations from system-level requirements.
  • Evaluate design flows and use design tools to support complex blocks, SoCs, or IC packages.

What they ask for

  • Bachelor’s degree in Science, Engineering, or related field and 4+ years of relevant ASIC experience; OR Master’s degree and 3+ years; OR PhD and 2+ years.
  • Experience in ASIC design, verification, validation, integration, or related work.

Nice to have

  • Master’s degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
  • 6+ years of relevant ASIC experience; experience with architecture/design tools, scripting/programming languages, design verification methods, or interaction with senior leadership.

Pay

$145,600.00 - $218,400.00 USD base salary

Tools

RTL to GDS Flow, Virtuoso

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)