Qualcomm
SoC HW Architecture
$155K–$233K
San Diego, California +1 · On-site · Full-time · Posted Oct 1, 2026
- Location
- San Diego, California
Santa Clara, California - Experience
- Bachelor's: 4+ years of Systems Engineering or related work experience; Master's: 3+ years; PhD: 2+ years. Also requires 2+ years in one or more system architecture technology areas and products.
- Education
- Bachelor's, Master's, or PhD in Electrical Engineering, Computer Science, or a related field.
About the job
Defines architecture for next-generation SoC infrastructure hardware IP, including interconnect, system cache, memory controllers, and system MMU, based on product requirements and software-friendly hardware/software interfaces.
What you'll do
- Define SoC infrastructure hardware architectures and hardware/software interfaces.
- Drive architecture trade-offs across hardware and software, considering the end-to-end silicon design flow.
- Model and validate performance and contribute to RTL design and the complete design flow.
What they ask for
- Strong knowledge and hands-on experience with multi-die/chiplet architectures and Die-to-Die and Chip-to-Chip Links.
- Strong knowledge of industry-standard interconnect and IO device protocols, SoC infrastructure IP architecture, and QoS, clock, power-management, security, and debug architectures.
- Experience with performance modeling and validation, and RTL design and the complete design flow.
- 2+ years of experience in one or more system architecture technology areas and products.
Nice to have
- Experience in Data Science or Machine Learning; Functional Safety experience.
- Knowledge of platform system architecture (ARM, X86, or RISC-V) and industry standards such as PCIe, CXL, USB, UFS, MIPI, and UCIe.
Pay
$155,400.00 - $233,200.00 USD base salary
Tools
ARM, X86, RISC-V, PCIe, CXL, USB, UFS, UCIe
Model-written summary · the original posting is authoritative