Drimva

Qualcomm

SOC Power Architect

$174K–$262K

San Diego, California · On-site · Full-time · Posted Sep 23, 2026

Experience
10+ years of strong experience in power and limits systems. Minimum qualifications also state 6+ years with a bachelor's degree, 5+ years with a master's degree, or 4+ years with a PhD in a related field, in ASIC design, verification, validation, integration, or related work.
Education
Bachelor's, master's, or PhD in Science, Engineering, or a related field.

About the job

Defines and develops power-control and limit architectures that maximize system performance while enforcing thermal and electrical limits, with minimal software intervention.

What you'll do

  • Develop the next-generation power and limits system, including a fast DCVS system for power-delivery transient response.
  • Define power and limits architecture and microarchitecture, considering interactions with system, software, and product teams.
  • Support power-control and limits design for compute-intensive systems, including CPU, GPU, and NSP.

What they ask for

  • Strong experience in power and limits systems.
  • Familiarity with UPF and power-domain crossing.
  • Experience with low-power design methodology and clock-domain-crossing designs.
  • Proficiency in Perl and Python scripting.

Nice to have

  • Expertise in post-Si debug.

Pay

$174,400.00 - $261,600.00 USD base salary

Tools

UPF, Perl, Python

AI focus

Develops power and limits systems for compute-intensive applications including AI systems.

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)