Qualcomm
SoC Power Design Engineer
$122K–$183K
San Diego, California · On-site · Full-time · Posted Oct 20, 2026
- Experience
- 2+ years with a bachelor's degree; 1+ year with a master's degree; no years stated with a PhD. Preferred: 3+ years of ASIC design, verification, validation, integration, or related work; 2+ years with architecture and design tools, scripting tools and programming languages, and design verification methods.
- Education
- Bachelor's, master's, or PhD in Science, Engineering, or a related field.
About the job
Defines, designs, optimizes, verifies, and implements ASIC IP and SoC designs, including evaluating power and timing and coordinating implementation across teams.
What you'll do
- Develop and document ASIC IP or SoC architectures, specifications, logic designs, and simulations based on system requirements.
- Evaluate design flow from high-level design through synthesis, place and route, timing, power use, and verification.
- Collaborate across teams to execute implementation strategies that meet system requirements and customer needs.
What they ask for
- Bachelor's degree in Science, Engineering, or related field; or Master's degree in Science, Engineering, or related field; or PhD in Science, Engineering, or related field.
- For a bachelor's degree, 2+ years of ASIC design, verification, validation, integration, or related work experience; for a master's degree, 1+ year; no experience minimum is stated for a PhD.
Nice to have
- Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
- Experience with ASIC design, architecture and design tools, scripting tools and programming languages, and design verification methods.
Pay
$121,800.00 - $182,600.00 USD (base salary)
Tools
RTL to GDS Flow, Virtuoso
Model-written summary · the original posting is authoritative