Drimva

Qualcomm

SOC Verification and Methodology Engineer

$174K–$262K

San Diego, California · On-site · Full-time · Posted Sep 17, 2026

Experience
The description asks for minimum 10+ years of design verification experience. Minimum qualifications also specify 6+ years with a bachelor's degree, 5+ years with a master's degree, or 4+ years with a PhD. Preferred qualifications mention 15+ years of industry experience.
Education
Bachelor’s degree in Science, Engineering, or related field; minimum qualifications also allow a master's degree or PhD in those fields with the stated experience alternatives.

About the job

Verifies Qualcomm SoC designs by developing verification plans and methodologies, executing tests, and debugging issues from design specifications through tapeout.

What you'll do

  • Develop verification plans, test plans, and verification infrastructure.
  • Implement and execute test cases; debug issues and analyze SystemVerilog assertions and code, toggle, and functional coverage.
  • Collaborate with design and verification teams, and improve testbench quality and verification processes.

What they ask for

  • SystemVerilog/UVM verification experience, including assertion- and coverage-based methodology.
  • Experience handling verification from test planning through tapeout for large hardware designs.
  • Strong communication skills for collaboration with worldwide teams.

Nice to have

  • Knowledge of SoC/CPU architecture, DSP, AMBA Bus, DDR, GPU, multimedia, or ARM SBSA; ARM knowledge is helpful.
  • Experience with multi-die verification, D2D interfaces (UCIe, CXL), pre-silicon emulation, scripting (Perl, Python), or formal tools.

Pay

$174,400.00 - $261,600.00 USD base salary

Tools

SystemVerilog, UVM, ARM, AMBA Bus, DDR, GPU, Perl, Python

AI focus

The role verifies SoC designs for product areas that include Machine Learning (AI/ML); no specific AI development duties are stated.

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)