Sr. Staff PCIE Subsystem Architect

What you'll do

• Define subsystem architecture and drive requirements across accelerator, server, and rack-scale systems.
• Address PCIe and other high-speed I/O behavior, including ordering, DMA, link operation, error recovery, and virtualization.
• Coordinate technical requirements and alignment with customers, product management, systems teams, and architecture stakeholders.

What they ask for

• Bachelor's degree in Electrical Engineering, Computer Science, or related field and 8+ years of Systems Engineering or related work experience; OR a master's degree in one of those fields and 7+ years; OR a PhD in one of those fields and 6+ years.
• 2+ years of experience in one or more system architecture technology areas and products.
• In-depth knowledge of PCIe, Ethernet, and other high-speed I/O interfaces used in datacenter and accelerator products.
• Strong understanding of PCIe ordering, Gen6/Gen7 requirements, error containment and recovery, I/O virtualization, and server-class RAS, telemetry, reliability, and security.

Nice to have

• Understanding of PCIe security and confidential-compute features, PCIe CEM standards, retimers, signal integrity, and system validation.
• Knowledge of emerging interconnects such as UCIe, UALink/UAL, and UEC, and PCIe firmware, BIOS/UEFI, OS, driver, and system-software requirements.

Pay

$216,600.00 - $325,000.00 USD base salary

Tools

PCIe, CXL, Ethernet, ARM, SR-IOV, SIOV, UCIe, UALink/UAL

AI focus

Architects high-performance I/O subsystems for next-generation datacenter AI products and accelerator systems.